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INTEGRATED CIRCUITS
DATA SHEET
TDA8580J Multi-purpose power amplifier
Preliminary specification Supersedes data of 1998 Feb 25 File under Integrated Circuits, IC01 2000 Apr 18
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
FEATURES General * Supply voltage range from 8 to 24 V * Low distortion * Few external components, fixed gain * High output power * Can be used as a stereo amplifier in Bridge-Tied Load (BTL) or quad Single-Ended (SE) amplifiers * Single-ended mode without loudspeaker capacitor * Mute and standby mode with one- or two-pin operation * Diagnostic information for Dynamic Distortion Detector (DDD), high temperature (145 C) and short-circuit * No switch on/off plops when switching between standby and mute or mute and on; an external RC-network is prescribed to ensure plop-free operation * Low offset variation at outputs between mute and on * Fast mute on supply voltage drops. Protection
TDA8580J
* Short-circuit proof to ground, positive supply voltage and across load; the supply voltage ranges where the different short circuit conditions are guaranteed are given in Chapter "Limiting values" * ESD protected on all pins * Thermal protection against temperatures exceeding 150 C. GENERAL DESCRIPTION The TDA8580J is a stereo Bridge-Tied Load (BTL) or a quad Single-Ended (SE) amplifier that operates over a wide supply voltage range from 8 to 24 V. This makes it suitable for applications such as television, home-sound systems and active speakers. Because of an internal voltage buffer, this device can be used without a capacitor connected in series with the load (SE application). A combined BTL and 2 x SE application can also be configured (one chip stereo and subwoofer application).
ORDERING INFORMATION TYPE NUMBER TDA8580J PACKAGE NAME DBS17P DESCRIPTION plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) VERSION SOT243-1
2000 Apr 18
2
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
QUICK REFERENCE DATA SYMBOL VP Iq(tot) Istb Gv Po THD PARAMETER operating supply voltage total quiescent current standby supply current VP = 14.4 V VP = 14.4 V CONDITIONS MIN. 8.0 - - 31 THD = 0.5%; VP = 14.4 V; RL = 4 THD = 0.5%; VP = 24 V; RL = 8 total harmonic distortion fi = 1 kHz; Po = 1 W; VP = 14.4 V; RL = 4 fi = 1 kHz; Po = 10 W; VP = 24 V; RL = 8 Voffset(DC) Vno SVRR DC output offset voltage noise output voltage supply voltage ripple rejection VP = 14.4 V; mute condition; RL = 4 VP = 14.4 V; on condition Rs = 1 k; VP = 14.4 V fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition; Rs = 0 14 21 - - - - - 50 TYP. 14.4 140 1
TDA8580J
MAX. 24 170 50
UNIT V mA A dB W W % % mV mV V dB
Bridge-tied load application voltage gain output power 32 15 23 0.05 0.02 10 0 100 60 33 - - 0.1 0.05 20 140 150 -
Single-ended application Gv Po Voffset(DC) Vno SVRR voltage gain output power DC output offset voltage noise output voltage supply voltage ripple rejection THD = 0.5%; VP = 14.4 V; RL = 4 THD = 0.5%; VP = 24 V; RL = 4 VP = 14.4 V; mute condition; RL = 4 VP = 14.4 V; on condition Rs = 1 k; VP = 14.4 V fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition; Rs = 0 25 3.8 10.5 - - - 40 26 4.0 11.5 10 0 80 45 27 - - 20 100 120 - dB W W mV mV V dB
2000 Apr 18
3
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
BLOCK DIAGRAM
TDA8580J
VP1
handbook, full pagewidth
VP2 15 45 k
3 IN1 7 60 k
- +
V/I
- + +
OA
1
TDA8580J
IN2 8 60 k Vpx
OUT1+
+ -
V/I Vpx 45 k
-
OA
4
OUT2-
45 k
30 k BUFFER
9 45 k BUFFER
BUFFER
60 k IN3 10
- +
V/I
45 k
- + +
OA
14
OUT3-
IN5
12 60 k
+ -
V/I
-
OA
17
OUT4+
IN4
11 13 5 INTERFACE
45 k
MUTE STANDBY
DIAGNOSTIC
6
DIAG
2 PGND1
16
MGE010
PGND2
Fig.1 Block diagram.
2000 Apr 18
4
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
PINNING SYMBOL OUT1+ PGND1 VP1 OUT2- STANDBY DIAG IN1 IN2 BUFFER IN3 IN4 IN5 MUTE OUT3- VP2 PGND2 OUT4+ PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 DESCRIPTION non-inverting output 1 power ground 1 supply voltage 1 inverting output 2 standby/mute/on selection input diagnostic output input 1 input 2 single-ended buffer output input 3 input 4 input 5; signal ground capacitor connection mute/on selection input inverting output 3 supply voltage 2 power ground 2 non-inverting output 4
MUTE OUT3- VP2 PGND2 OUT4+ 13 14 15 16 17
MGE009
TDA8580J
handbook, halfpage
OUT1+ PGND1 VP1 OUT2- STANDBY DIAG IN1 IN2 BUFFER IN3 IN4 IN5
1 2 3 4 5 6 7 8 9 10 11 12
TDA8580J
Fig.2 Pin configuration.
2000 Apr 18
5
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
FUNCTIONAL DESCRIPTION The TDA8580J is a multi-purpose power amplifier with four amplifiers which can be connected in the following configurations with high output power and low distortion (at minimum quiescent current): * Dual bridge-tied load amplifiers * Quad single-ended amplifiers * Dual single-ended amplifiers and one bridge-tied load amplifier. The amplifier can be switched in on, mute and off (standby) by the MUTE and STANDBY pins (for interfacing directly with a microcontroller). One-pin operation is also possible by applying a voltage greater than 8 V to the STANDBY pin to switch the amplifier in on mode. Special attention is given to the dynamic behaviour as follows: * Slow offset change between mute and on (controlled by MUTE and STANDBY pins)
TDA8580J
* Low noise levels, which are independent of the supply voltage. Protections are included to avoid the IC being damaged at: * Over temperature: Tj > 150 C * Short-circuit of the output pin(s) to ground or supply rail; when short-circuited, the power dissipation is limited * ESD protection (Human Body Model 3000 V, Machine Model 300 V) * Energy handling. A DC voltage of 6 V can be connected to the output of any amplifier while the supply pins are short-circuited to ground. Diagnostics are available for the following conditions (see Figs 3, 4 and 5): * Chip temperature above 145 C * Distortion over 2% due to clipping * Short-circuit protection active.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VP VDIAG IOSM IORM VP(scol) VP(scg) VP(scs) VP(rp) Ptot Tj Tstg Tamb supply voltage voltage on pin DIAG non-repetitive peak output current repetitive peak output current supply voltage with short-circuit across load supply voltage with short-circuit from output to ground supply voltage with short-circuit from output to supply reverse polarity total power dissipation junction temperature storage temperature ambient temperature PARAMETER CONDITIONS operating no signal condition MIN. - - - - - - - - - - - -55 -40 MAX. 24 28 18 6 4.5 28 26 16 6 75 150 +150 +85 UNIT V V V A A V V V V W C C C
THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Rth(j-c) PARAMETER thermal resistance from junction to ambient thermal resistance from junction to case CONDITIONS in free air VALUE 40 1.5 UNIT K/W K/W
2000 Apr 18
6
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
CHARACTERISTICS VP = 14.4 V; Tamb = 25 C; fi = 1 kHz; RL = ; measured in test circuit of Fig.28; unless otherwise specified. SYMBOL Supplies VP Iq(tot) Istb VO VP(mute) VI operating supply voltage total quiescent current standby current DC output voltage low supply voltage mute DC input voltage 8.0 - - - 6.0 - 14.4 140 1 7.0 7.0 4.0 24 170 50 - 8.0 - V mA A V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Control pins STANDBY PIN (see Table 1) V5(stb) Vhys(5)(stb) V5(mute) V5(on) voltage at STANDBY pin for standby condition hysteresis voltage at STANDBY pin for standby condition voltage at STANDBY pin for mute condition voltage at STANDBY pin for on condition note 1 V13 < 0.8 V VP > 9 V; note 2 0 - 2.0 8.0 - 0.2 - - 0.8 - 5.3 18 V V V V
MUTE PIN (see Table 1) V13(mute) V13(on) VOL ILI CD Tj(diag) voltage at MUTE pin for mute condition V5 = 5 V 0 2.5 - - 1 - - - 0.2 - 2 145 0.8 5.3 V V
voltage at MUTE pin for on condition V5 = 5 V LOW-level output voltage leakage current clip detector junction temperature for high temperature warning Isink = 1 mA VDIAG = 14.4 V VDIAG < 0.8 V VDIAG < 0.8 V
Diagnostic; output buffer (open-collector); see Figs 3, 4 and 5 0.8 1 4 - V A % C
Stereo BTL application; see Figs 6, 7, 10, 11, 14, 15, 18, 19, 21, 22, 23, 24, 26 and 28 THD total harmonic distortion fi = 10 kHz; Po = 1 W; RL = 4 ; filter: 22 Hz < f < 30 kHz fi = 1 kHz; Po = 1 W; VP = 14.4 V; RL = 4 fi = 1 kHz; Po = 10 W; VP = 24 V; RL = 8 Po output power THD = 0.5%; VP = 24 V; RL = 8 THD = 10%; VP = 14.4 V; RL = 4 THD = 10%; VP = 24 V; RL = 8 Gv voltage gain Vo(rms) = 3 V - - - 0.2 0.05 0.02 15 23 20 30 32 0.3 0.1 0.05 - - - - 33 % % % W W W W dB
THD = 0.5%; VP = 14.4 V; RL = 4 14 21 18 28 31
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Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
SYMBOL cs Gv Voffset(DC) Vno Vno(mute) Vo(mute) SVRR
PARAMETER channel separation channel unbalance DC output offset voltage noise output voltage noise output voltage mute output voltage mute supply voltage ripple rejection
CONDITIONS Po = 2 W; fi = 1 kHz; RL = 4 on condition mute condition; RL = 4 Rs = 1 k; VP = 14.4 V; note 3 note 3 Vi(rms) = 1 V Rs = 0 ; fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition Rs = 0 ; Vi(rms) = 0.5 V; fi = 1 kHz fi = 1 kHz; Po = 1 W; RL = 4 fi = 10 kHz; Po = 1 W; RL = 4 ; filter: 22 Hz < f < 30 kHz fi = 1 kHz; Po = 1 W; VP = 24 V, RL = 4 ; filter: 22 Hz < f < 30 kHz
MIN. 60 - - - - - - 50
TYP. 65 - 0 10 100 0 3 60
MAX. - 1 140 20 150 20 500 -
UNIT dB dB mV mV V V V dB
Zi CMRR
input impedance common mode rejection ratio
23 - - - -
30 60
37 - 0.1 0.3 0.1 - - - - 27 - 1 100 20 120 20 500 - 74 -
k dB
Quad SE application; see Figs 8, 9, 12, 13, 16, 17, 20, 25, 27 and 29 THD total harmonic distortion 0.05 0.2 0.05 4.0 11.5 5.2 15 26 46 - 0 10 80 0 3 45 60 60 % % % W W W W dB dB dB mV mV V V V dB k dB
Po
output power
THD = 0.5%; VP = 14.4 V; RL = 4 3.8 THD = 0.5%; VP = 24 V; RL = 4 THD = 10%; VP = 14.4 V; RL = 4 THD = 10%; VP = 24 V; RL = 4 10.5 4.9 14 25 40 - VP = 14.4 V; on condition VP = 14.4 V; mute condition; RL = 4 - - - - - 40 46 Vi(rms) = 0.5 V; fi = 1 kHz; Rs = 0 -
Gv cs Gv Voffset(DC)
voltage gain channel separation channel unbalance DC output offset voltage
Vo(rms) = 3 V Po = 2 W; fi = 1 kHz; RL = 4
Vno Vno(mute) Vo(mute) SVRR Zi CMRR Notes
noise output voltage noise output voltage mute output voltage mute supply voltage ripple rejection input impedance common mode rejection ratio
Rs = 1 k; VP = 14.4 V; note 3 note 3 Vi(rms) = 1 V fi = 1 kHz; Vripple(p-p) = 2 V, on or mute condition; Rs = 0
1. Hysteresis between the rise and fall voltage when pin STANDBY is controlled with low ohmic voltage source. 2. At lower VP the voltage at the STANDBY pin for on condition will be adjusted automatically to maintain an on condition at low battery voltage (down to 8 V) when using one-pin operation. 3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz.
2000 Apr 18
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Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
Table 1 Selection of standby, mute and on VOLTAGE AT PIN MUTE don't care < 0.8 V 2.5 to 5.3 V don't care standby (off) mute (DC settled) on (AC operating) on (AC operating)
TDA8580J
VOLTAGE AT PIN STANDBY < 0.8 V 2 to 5.3 V 2 to 5.3 V 8.0 V
FUNCTION
handbook, halfpage
temperature overload DIAG
handbook, halfpage
normal DIAG
active DDD
normal
amplifier output
amplifier output
MGE021
MGE020
Fig.3 Diagnostic waveform: temperature overload.
Fig.4 Diagnostic waveform: DDD function.
2000 Apr 18
9
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, halfpage
1
MGS700
THD (%)
handbook, halfpage
short-circuit to VP GND DIAG
10-1
(1)
(2)
amplifier output
MGE022
10-2 10
102
103
104 f (Hz) 105 i
RL = 4 ; VP = 14.4 V; 2 channel driven. (1) Po = 1 W. (2) Po = 10 W.
Fig.5
Diagnostic waveform: short-circuit to GND or VP.
Fig.6
Total harmonic distortion as a function of frequency; BTL mode.
handbook, halfpage
1
MGS701
handbook, halfpage
1
MGS702
THD (%)
THD (%)
10-1
(1)
10-1
(2)
10-2 10
102
103
104 f (Hz) 105 i
10-2 10
102
103
104 f (Hz) 105 i
RL = 8 ; VP = 24 V; 2 channel driven. (1) Po = 1 W. (2) Po = 10 W.
Po = 1 W; RL = 4 ; VP = 14.4 V; 4 channel driven.
Fig.7
Total harmonic distortion as a function of frequency; BTL mode.
Fig.8
Total harmonic distortion as a function of frequency; SE mode.
2000 Apr 18
10
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, halfpage
1
MGS703
102 handbook, halfpage THD (%) 10
(2) (1) (3)
MGS704
THD (%)
10-1
(1)
1
(1) (2)
10-1
(2)
(3)
10-2 10
102
103
104 f (Hz) 105 i
10-2 10-1
1
10
Po (W)
102
RL = 4 ; VP = 24 V; 4 channel driven. (1) Po = 5 W. (2) Po = 1 W.
RL = 4 ; VP = 14.4 V; 2 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
Fig.9
Total harmonic distortion as a function of frequency; SE mode.
Fig.10 Total harmonic distortion as a function of output power; BTL mode.
102 handbook, halfpage THD (%) 10
MGS705
102 handbook, halfpage THD (%)
MGS706
(2) (3) (1)
10
(2) (1) (3)
1
1
(1)
10-1
(1)
10-1
(2)
(2) (3)
10-2
(3)
10-1
1
10
Po (W)
102
10-2
10-1
1
Po (W)
10
RL = 8 ; VP = 24 V; 2 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
RL = 4 ; VP = 14.4 V; 4 channel driven (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
Fig.11 Total harmonic distortion as a function of output power; BTL mode.
Fig.12 Total harmonic distortion as a function of output power; SE mode.
2000 Apr 18
11
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
102 handbook, halfpage THD (%) 10
(2) (3) (1)
MGS707
handbook, halfpage
30
MGS708
Pd (W) 20
1
(1)
10
10-1
(2) (3)
10-2
10-1
1
10
Po (W)
102
0 0 10 20 Po (W) 30
RL = 4 ; VP = 24 V; 4 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
fi = 1 kHz; RL = 4 ; VP = 14.4 V; 2 channel driven.
Fig.13 Total harmonic distortion as a function of output power; SE mode.
Fig.14 Power dissipation as a function of output power; BTL mode.
MGS709
MGS710
handbook, halfpage
40
handbook, halfpage
16
Pd (W) 30
Pd (W) 12
20
8
10
4
0 0 10 20 30 Po (W) 40
0
0
2
4
Po (W)
6
fi = 1 kHz; RL = 8 ; VP = 24 V; 2 channel driven.
fi = 1 kHz; RL = 4 ; VP = 14.4 V; 4 channel driven.
Fig.15 Power dissipation as a function of output power; BTL mode.
Fig.16 Power dissipation as a function of output power; SE mode.
2000 Apr 18
12
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, halfpage
40
MGS711
MGS712
handbook, halfpage
40
Pd (W) 30
Po (W) 30
20
20
(1)
(2)
10
10
0 0 4 8 12 Po (W) 16
0 8 12 16 VP (V) 20
fi = 1 kHz; RL = 4 ; VP = 24 V; 4 channel driven.
fi = 1 kHz; RL = 4 ; 2 channel driven. (1) THD = 10%. (2) THD = 0.5%.
Fig.17 Power dissipation as a function of output power; SE mode.
Fig.18 Output power as a function of supply voltage; BTL mode.
handbook, halfpage
40
MGS713
MGS714
handbook, halfpage
16
Po (W) 30
Po (W) 12
20
8
(1) (1) (2)
10
(2)
4
0 8 12 16 20 VP (V) 24
0
8
12
16
20
VP (V)
24
fi = 1 kHz; RL = 8 ; 2 channel driven. (1) THD = 10%. (2) THD = 0.5%
fi = 1 kHz; RL = 4 ; 2 channel driven. (1) THD = 0.5%. (2) THD = 10%
Fig.19 Output power as a function of supply voltage; BTL mode.
Fig.20 Output power as a function of supply voltage; SE mode.
2000 Apr 18
13
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, halfpage
34
MGS717
0.8 Po (W) 0.4
MGS715
Gv (dB) 33
32
0
31
-0.4
30 10
102
103
104 f (Hz) 105 i
-0.8 10
102
103
104 f (Hz) 105 i
Ci = 470 nF.
THD = 0.5%; RL = 4 ; VP = 14.4 V.
Fig.21 Gain as a function of input frequency; BTL mode.
Fig.22 Power bandwidth as a function of frequency; BTL mode.
handbook, halfpage
0.8
MGS716
handbook, halfpage
Po (W) 0.4
cs (dB)
-50
MGS718
-54
-58 0 -62 -0.4
(1)
-66
(2)
-0.8 10
102
103
104 f (Hz) 105 i
-70 10
102
103
104 f (Hz) 105 i
THD = 0.5%; RL = 8 ; VP = 24 V.
Po = 2 W; RL = 4 ; VP = 14.4 V. (1) Channels 3 and 4 to channels 1 and 2. (2) Channels 1 and 2 to channels 3 and 4.
Fig.23 Power bandwidth as a function of frequency; BTL mode.
Fig.24 Channel separation as a function of frequency; BTL mode.
2000 Apr 18
14
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, halfpage
-20
MGS719
handbook, halfpage
-20
MGS720
cs (dB) -30
SVRR (dB) -40
-40 (1)
(2) (3)
(1) (2)
-60
-50
-60 10
102
103
104 f (Hz) 105 i
-80 10
102
103
104 f (Hz) 105 i
Po = 2 W; RS = 0 ; RL = 4 ; VP = 14.4 V. (1) Channel 1 to channel 2. (2) Channel 1 to channel 3. (3) Channel 1 to channel 4.
Rs = 0 ; Vripple(p-p) = 2 V. (1) Vp = 14.4 V. (2) Vp = 24 V.
Fig.25 Channel separation as a function of frequency; SE mode.
Fig.26 SVRR as a function of frequency; BTL mode.
handbook, halfpage
-20
MGS721
SVRR (dB) -30
-40
(1)
(2)
-50
-60 10
102
103
104 f (Hz) 105 i
Rs = 0 ; Vripple(p-p) = 2 V. (1) Vp = 14.4 V. (2) Vp = 24 V.
Fig.27 SVRR as a function of frequency; SE mode.
2000 Apr 18
15
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
APPLICATION INFORMATION The application circuit depends on the supply voltage used. For supply voltages below 18 V the application circuits are shown in Figs 28, 29 and 30. The typical application circuits for the different supply voltage ranges are shown in Figs 31, 32 and 33. Additional information for the applications shown in Figs 28, 29 and 30 The RC-network connected to pin 5 determines the amplifier switch on/off behaviour as follows; * Switched from STANDBY to MUTE when Vswitching (typically 9 V) is enabled and the switch SW1 is closed. During MUTE there is no output noise and no offset. * Switched from MUTE to ON when the switch SW1 is opened. During switching ON the offset and noise are gradually built up. The time constant is fixed by R1 x C1. The inputs can be tied together and connected to one input capacitor. Because the input resistance is decreased by a factor of 2, the low frequency roll-off is shifted to a higher frequency when Ci is kept the same value. The low frequency cut-off is determined by; f -3dB = 1 ( 2 x R i x C i ) 1 = --------------------------------------------------------------------- = 12 Hz. 3 -9 2 x 60 x 10 x 220 x 10 The Boucherot network connected to the buffer (pin 9) is necessary to guarantee a low output resistance at high frequencies when the buffer is loaded (only in SE applications). Additional information for the applications shown in Figs 31, 32 and 33 Short circuit behaviour at high supply voltages (Vp > 18 V): * When Vp > 18 V it is advisable to use the applications given in Figs 32 and 33. In these applications the diagnostics output is tied to pin 5 (one pin operation) or pin 13 (two pin operation). During a fault condition the amplifier is soft-muted and the amplitude of the output signal is reduced at: - over temperature (still large dynamic range) - short to ground and over load (output current reduced)
TDA8580J
* The 4.7 F capacitor and the 10 k resistor connected to pin 5 or to pin 13 are used to: - provide a stable loop - control the switch on/off behaviour - minimize the effect due to clip detection. Use of common buffer In SE applications the buffer output is used in place of a SE capacitor. To minimize the crosstalk (high channel separation) and distortion it is advised to connect the speaker wires as closely as possible to pin 9 without using a shared wire. Internally in the IC all the efforts have been taken to minimize the crosstalk by locating the feedback loops as close as possible to pin 9. If a common wire is shared by all the speakers, the series resistance of this shared wire will introduce added signal voltages resulting from the currents flowing through this wire when a connected amplifier is driven by a signal. Optimize the THD performance The TDA8580J application can be optimized to gain the lowest THD possible by applying the following guidelines: * SE application: minimize the shared wires to pin 9 (see section "Use of common buffer"). * Because the inputs are quasi differential, ground loops can be avoided by connecting the negative terminal of the 100 F signal ground capacitor (connected to pin 12) to the ground pin of the signal processor. Note: do not leave the inputs in the open condition to prevent HF oscillation. * Increase the value of electrolytic supply capacitor (typical value 1000 F) to the maximum possible to minimize cross talk and distortion at low signal frequencies, due to the PSRR (power supply rejection ratio). For suppressing high frequency transients on the supply line a capacitor (typical value 100 nF) with a low ESR is required to be connected in parallel with the electrolytic capacitor. The capacitor combination must be placed as close as possible to the IC (using short interconnection tracks). Headroom A typical CD requires at least 12 dB dynamic headroom (a factor of 15.85), compared with the average power output, for passing the loudest parts without distortion.
2000 Apr 18
16
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
For BTL application at Vp = 24 V, RL = 8 and Po at THD = 0.5% (see Fig.15), the Average Listening Level (ALL) for music power without distortion yields: 23 P o ( ALL ) = -------------- = 1.45 W. 15.85 Table 2 Pd as a function of headroom (music signals) for Po = 2 x 23 W (THD = 0.5%). HEADROOM 0 dB 12 dB 32 W 16 W Pd EXAMPLE Measured or given values: Vp = 24 V RL = 8 (2 x BTL)
TDA8580J
Measured worst case Pd (sine wave) = 32 W Tj(max) = 150oC Tamb(max) = 60oC Rth(j-c) = 1.5 K/W T j ( max ) - T amb ( max R th ( hs ) = -------------------------------------------------) - R th ( j - c ) Pd 150 - 60 = --------------------- - 1.5 = 1.3 K/W 32 Table 3 Heatsink thermal resistance as a function of headroom for Po = 2 x 23 W (THD = 0.5%). HEAD ROOM 0 dB 12 dB Pd 32 W 16 W Rth(hs) 1.3 K/W 4.12 K/W
So for the average music listening level a total power dissipation of 16 W can be used for calculating the optimum heat sink thermal resistance. Heatsink calculation The measured thermal resistance of this package Rth(j-c) is a maximum of 1.5 K/W. For a maximum ambient temperature of 60oC the required heatsink thermal resistance can be calculated as shown in the following example.
2000 Apr 18
17
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, full pagewidth
1000 F 16/40 V VP1 3 VP2 15 45 k
VP 100 nF
220 nF
IN1 7 60 k
- +
V/I
VinL
- + +
OA
1 OUT1+
TDA8580J
IN2 8 60 k Vpx
+
4 OUT2-
-
4 or 8
+ -
V/I Vpx 45 k
-
OA
45 k
30 k BUFFER 100 F 10 V
9 BUFFER 45 k BUFFER
IN5 12 60 k IN3 10
- +
V/I
45 k
- + +
OA
14 OUT3-
+ -
OA 17 OUT4+
4 or 8
220 nF VinR
60 k IN4 11 MUTE 13
+ -
V/I
-
45 k 10 k
+5 V 6 DIAG
STANDBY Vswitching (9 V typical)
5
INTERFACE
DIAGNOSTIC
2 PGND1
16 PGND2
MGU075
R1
(1)
R2 4.7 F SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
Fig.28 Stereo bridge-tied load application; VP 18 V.
2000 Apr 18
18
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, full pagewidth
1000 F 16/40 V VP1 3 220 nF IN1 7 VinR 60 k VP2 15 45 k
VP 100 nF
- +
V/I
- + +
OA
1
OUT1+
TDA8580J
FRONT
VinL Vpx 220 nF IN2 8 60 k
+
4 OUT2-
4 or 8
-
+ -
V/I Vpx 45 k
-
OA
45 k
- +
9 BUFFER
4 or 8
30 k BUFFER 100 F 10 V 220 nF VinR 60 k IN4 11
2 220 nF
45 k
BUFFER
+
45 k
IN5 12 60 k IN3 10
- +
V/I
-
14 OUT3-
4 or 8
- + +
OA
-
OA 17 OUT4+
+ -
V/I
+
4 or 8
REAR
VinL
-
220 nF
45 k +5 V 10 k
MUTE 13 STANDBY 5 INTERFACE DIAGNOSTIC 6 DIAG
Vswitching (9 V typical) PGND1 R1
(1)
2
16 PGND2
MGU077
R2 4.7 F SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
Fig.29 Quad single-ended application; VP 18 V.
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Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, full pagewidth
1000 F 16/40 V VP1 3 VP2 15 45 k
VP 100 nF
220 nF VinR
IN1 7 60 k
- +
V/I
- + +
OA
1
OUT1+
TDA8580J
IN2 8 60 k Vpx
+
4 OUT2-
4 or 8
-
+ -
V/I Vpx 45 k
-
OA
45 k
30 k BUFFER 100 F 10 V 220 nF VinR 60 k IN4 11 MUTE 13 STANDBY 5 Vswitching (9 V typical) PGND1 R1
(1)
9 45 k BUFFER
BUFFER
2 220 nF
+
45 k
IN5 12 60 k IN3 10
- +
V/I
-
14 OUT3-
4 or 8
- + +
OA
-
OA 17 OUT4+
+ -
V/I
+
4 or 8
-
220 nF VinL
45 k +5 V 6 DIAG 10 k
INTERFACE
DIAGNOSTIC
2
16 PGND2
MGU076
R2 4.7 F SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
Fig.30 Dual single-ended and one bridge-tied load application; VP 18 V.
2000 Apr 18
20
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, full pagewidth
VP 100 nF 1000 F IN1 IN2 inputs Vswitching (9 V typical)
(3)
VP1 7 8 10 11 12 3
VP2 15 1 4 14 OUT1+ OUT2- OUT3- OUT4 + BUFFER 2 (2) 220 nF (2)
(1)
IN3 IN4 IN5 100 F STANDBY
TDA8580J
17 9
R1 45 k
5 2 16 PGND1
6
DIAG
10 k
+5 V
MGS699
(3)
R2 15 k
PGND2
4.7 F
SW1
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ). (2) RC combination not required in BTL mode. (3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
Fig.31 Application 1; supply voltage range 8 V < VP 18 V; 1-pin and 2-pin operation.
handbook, full pagewidth
VP 100 nF 1000 F IN1 IN2 inputs Vswitching (9 V typical)
(3)
VP1 7 8 10 11 12 13 5 2 3
VP2 15 1 4 14 OUT1+ OUT2- OUT3- OUT4 + BUFFER 2 (2) 220 nF (2) 6 16 DIAG
(1)
IN3 IN4 IN5
TDA8580J
17 9
R1 45 k
100 F
MUTE STANDBY
(3)
R2 15 k
PGND1 4.7 F 3.6 V
PGND2
SW1
MGS697
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ). (2) RC combination not required in BTL mode. (3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
Fig.32 Application 2; supply voltage range 18 V < VP 24 V; 1-pin operation.
2000 Apr 18
21
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
handbook, full pagewidth VP
100 nF
1000 F IN1 IN2 inputs IN3 IN4 IN5 100 F STANDBY 5 7 8 10 11 12
VP1 3
VP2 15 1 4 14 OUT1+ OUT2- OUT3- OUT4 + BUFFER MUTE DIAG 4.7 F 10 k 2 (2) 220 nF (2)
(1)
TDA8580J
17 9 13 6
2 10 k 4.7 F MSB PGND1
16 PGND2
MUTE
MGS698
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ) (2) RC combination not required in BTL mode.
Fig.33 Application 3; supply voltage range 18 V < VP 24 V; 2-pin operation.
INTERNAL PIN CONFIGURATION
PIN 7, 8, 10, 11 and 12
NAME Inputs
EQUIVALENT CIRCUIT
Vint Vint 12
7, 8, 10 and 11
MGS723
1, 4, 9, 14 and 17
Outputs
VP
1, 4, 9, 14, and 17
0.5 VP
MGL849
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Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
PIN 5
NAME STANDBY
EQUIVALENT CIRCUIT
VP
5
MGL848
13
MUTE
Vint
13 4V
MGS724
6
DIAG
6
MGS722
2000 Apr 18
23
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
PACKAGE OUTLINE DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
TDA8580J
SOT243-1
non-concave D x Dh
Eh
view B: mounting base side
d
A2
B j E A
L3
L
Q c vM
1 Z e e1 bp wM
17 m e2
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 17.0 15.5 A2 4.6 4.4 bp 0.75 0.60 c 0.48 0.38 D (1) 24.0 23.6 d 20.0 19.6 Dh 10 E (1) 12.2 11.8 e 2.54 e1 e2 Eh 6 j 3.4 3.1 L 12.4 11.0 L3 2.4 1.6 m 4.3 Q 2.1 1.8 v 0.8 w 0.4 x 0.03 Z (1) 2.00 1.45
1.27 5.08
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT243-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-12-16 99-12-17
2000 Apr 18
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Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds.
TDA8580J
The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. suitable suitable(1) WAVE
2000 Apr 18
25
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
TDA8580J
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2000 Apr 18
26
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
NOTES
TDA8580J
2000 Apr 18
27
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/25/03/pp28
Date of release: 2000
Apr 18
Document order number:
9397 750 05478

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